Principal SoC Design Engineer - IoT/Chips
Microarchitecture development and specification - From early high-level architectural exploration, through micro-architectural research and arriving at a detailed specification.
- RTL ownership - Development, assessment and refinement of RTL design to target power, performance, area and timing goals.
- Validation - Support testbench development and simulation for functional and performance verification.
- Performance exploration and correlation - Explore high performance strategies and validate that the RTL design meets targeted performance.
- Implement RTL and synthesize design within constraints of area, timing, performance and power.
- Participate in design reviews, test plan and verification coverage definition.
This well established Silicon Valley fabless Internet of Things (IoT) company seeking a Principal SoC Design Engineer. This position will be a principal member of digital design team responsible for the SoC micro-architecture and RTL design for IoT/connectivity SERDES applications. The successful candidate will work with architecture team and suggest architectural tradeoffs based on feature, performance requirements, and system limitations and develop micro-architecture.