This well established Silicon Valley fabless Internet of Things (IoT) company seeking a Principal SoC Design Engineer. This position will be a principal member of digital design team responsible for the SoC micro-architecture and RTL design for IoT/connectivity SERDES applications.
- Microarchitecture development and specification - From early high-level architectural exploration, through micro-architectural research and arriving at a detailed specification.
- RTL ownership - Development, assessment and refinement of RTL design to target power, performance, area and timing goals.
- Validation - Support testbench development and simulation for functional and performance verification.
- Performance exploration and correlation - Explore high performance strategies and validate that the RTL design meets targeted performance.
- Implement RTL and synthesize design within constraints of area, timing, performance and power.
- Participate in design reviews, test plan and verification coverage definition.
- BS/MS or PhD degree in Electrical Engineering, Electronics Engineering.
- 10+ years of SoC micro-architecture and design experience.
- Extensive experience in designing and integrating video centric IPs within complex SoCs.
- Fluency in Verilog/VHDL, verification methodologies, tool flow, scripting languages and ASIC front-end tools.
- Strong understanding of hardware design, timing analysis, clock domain crossing, lint and verification.
- Experience in IP, Algorithm Model development using C/C++/ Matlab
- Ability to analyze design and work with verification team to define verification plan and debug design.
- Hands on lab bring-up and debug experience and familiarity with lab instruments.
- Strong analytical and communication skills.
Visa Requirements: Must be a US Citizen or US Green Card Holder